High Performance FPGA Memory Controller

High Performance FPGA DDR controller

The BA317 is a highly configurable DDR-SDRAM Memory Controller for FPGA, supporting latest DDR3 and DDR4 SDRAM devices (discrete as well as DIMMs).

It supports many features to achieve high bandwidth efficiency even with random address accesses. The user interface is a true configurable multi-port interface supporting standard interfaces (AXI or Avalon). Moreover, the memory controller is optimized for high frequency, low latency and low resource count.

The controller interfaces with the physical interface from the FPGA vendor. It can be implemented on any Xilinx, Altera devices.

The BA317 Memory controller improves the memory access efficiency in applications requiring small burst and random addressing accesses such as image processing and networking.


  • Smart arbiter and command sequencer
  • Multiple user ports, each individually configurable
  • Quad rate, half rate or full rate
  • Efficiency Monitor
  • Synthesizable BIST included
  • Fast Single language behavioral model to replace vendor Phy model
  • Available on Altera and Xilinx FPGA

Reference: BA317