Silex Insight handles all FPGA design steps from the conception up to the delivery of a FPGA netlist, the PCB and board manufacturing. This all upon the customer needs = Innovation for your Advantage.
Our partnership with FPGA vendors enables us to leverage the expanded capabilities of the latest FPGA technology. To accelerate the FPGA development cycle and time to market, we take advantage of modules from our “internal re-use database” as well as Silex Insight’s IP cores and partner’s IP cores. Those modules include PCIe DMA, DDR memory controller, video module toolbox, high-speed serial interfaces, network interfaces, and a lot more.
With our expertise in embedded software, Silex Insight is your perfect partner to build your system based on FPGA SoC components such as Xilinx Zynq and Intel SoC devices.
Silex Insight has many years of experience in video and image processing, networking, telecom, industrial, security and cryptography applications. Our IP cores and reference designs are at your disposal for evaluation, so that you can test the functionalities and performance on your platform or evaluation board.
From providing support on parts of your FPGA design to the delivery of full turnkey projects, Silex Insight can interact at different stages in the development cycle of your products. We are recognized for our state-of-the-art expertise, especially on complex and high-speed designs, our project management skills, first-time-right and reliable design methodology.
FPGA design activities
Pre-study and specification
- Specification definition in collaboration with customer
- FPGA selection
- Cost evaluation
- IP selection
Design and verification
- Architecture definition (aimed to be modular, generic, scalable and portable)
- RTL coding (VHDL, Verilog)
- Linting verification according to set of coding rules
- Extensive simulations at module and top level
- Advanced co-simulation flow with test scenarios in C or python that can be applied in simulation and during on-board testing.
- Non regression testing
- Automated synthesis & mapping flow
- Constraints definition and timing closure
- FPGA debugging using probing, debug modules,…
- Advanced verification flow using same test scenarios as in simulation with communication through JTAG, PCIe, Ethernet…
- Automated flow